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Appendix A. Firmware Checkpoint Three-Digit Codes
The three digit codes listed in Table 36 will appear to the left of the top row on the
Liquid Crystal Display (LCD) which is located on the front panel of the system. The
intended use of these codes is to assure the observer that the Firmware is
operational after power on, and before information appears on the console display.
Refer to 4.4, “Understanding the Firmware” on page 64 for more information on the
Firmware boot process.
Table 36 (Page 1 of 5). Firmware Checkpoint Three-Digit Codes
Code Description
F00 Manufacturing - Reserved for Parallel port download protocol
F02 Determine system bus speed, set ISA divisor
F04 Set memory refresh
F06 Jump to set environment or check flash
F08 Run recovery block base memory, test 2k, then set stack
F09 Copy CRC verification code to RAM
F0A Turn on cache
F0B Flush cache
F0C Jump to CRC verification code in RAM
F0D Compute composite image CRC
F0E Jump back to ROM
F0F Turn off cache
F10 Check if composite image CRC is valid
F11 GOOD CRC - jump to composite image
F12 BAD CRC - initialize base memory, stack
F13 BAD CRC - copy uncompressed recovery block code to RAM
F14 BAD CRC - jump to code in RAM
F15 BAD CRC - turn on cache
F16 BAD CRC - copy recovery block data section to RAM
F17 BAD CRC - Invalidate and flush cache, set TOC
F18 BAD CRC - branch to high level recovery control routine
F19 Initialize base memory, stack
F1A Copy uncompressed recovery block code to RAM
F1B Jump to code in RAM
F1C Turn on cache
F1D Copy recovery block data section to RAM
F1E Invalidate and flush cache, set TOC
F1F Branch to high level control routine
F20 Initialize System I/O
F21 Run a console diagnostic routine
Copyright IBM Corp. 1996 189
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