Ibm 990 Bedienungsanleitung

ibm.com/redbooksFront coverIBM zSeries 990 Technical GuideBill WhiteMario AlmeidaDick JornaStructure and design - A scalable server for an on demand

viii IBM ^ zSeries 990 Technical GuideTrademarksThe following terms are trademarks of the International Business Machines Corporation in the United S

88 IBM ^ zSeries 990 Technical GuideNote that I/O cage slot numbers 05, 14, 23, and 28 are reserved for eSTI-M cards.The PCHID number range from 000

Chapter 3. I/O system structure 89IOCP. The CHPID assignment associates the CHPID number to a physical channel port location (PCHID).HiperSockets (IQ

90 IBM ^ zSeries 990 Technical GuideTable 3-7 I/O and cryptographic features supportConfiguration rules notes1. The ESCON 16-port card feature code

Chapter 3. I/O system structure 917. The sum of IC, ICB-2, ICB-3, ICB-4, active ISC-3, and RPQ 8P2197 links supported on a 2084 server is limited to

92 IBM ^ zSeries 990 Technical GuideTable 3-8 Spanned and shared channelsNote that while the PCICA and PCIXCC cryptographic features do not have CH

Chapter 3. I/O system structure 93Table 3-9 lists the required connectors and cable types for each I/O feature on z990 servers.Table 3-9 I/O featur

94 IBM ^ zSeries 990 Technical GuideESCON channel port enablement featureThe 15 active ports on each 16-port ESCON feature are activated in groups of

Chapter 3. I/O system structure 95Figure 3-10 16-port ESCON - LIC-CCAn ESCON channel add will never activate the spare channel port. However, if th

96 IBM ^ zSeries 990 Technical GuideFigure 3-11 16-port ESCON channel sparingChannel port sparing can only occur between ports on the same 16-port

Chapter 3. I/O system structure 973.4.3 FICON channelWhat follows are the connectivity options in the FICON I/O interface environment.FICON Express

© Copyright IBM Corp. 2003, 2004. All rights reserved. ixPrefaceThe IBM Eserver® zSeries® 990 scalable server provides major extensions to the existin

98 IBM ^ zSeries 990 Technical GuideFICON Express SX featureThe z990 FICON Express SX feature (feature code 2320) occupies one I/O slot in the z990 I

Chapter 3. I/O system structure 99Adapter interruptions apply to a z990 FICON Express channel when in FCP mode (FCP CHPID type), which supports attac

100 IBM ^ zSeries 990 Technical GuideNotes1. The total number of FICON Express, OSA-Express, PCIXCC, and PCICA cards cannot exceed 20 per I/O cage.2.

Chapter 3. I/O system structure 101The z990 OSA-Express GbE LX feature occupies one slot in the z990 I/O cage and has two independent ports with one

102 IBM ^ zSeries 990 Technical GuideYou can choose any one of the following settings for the OSA-Express 1000BASE-T Ethernet feature:򐂰 Auto-negotiat

Chapter 3. I/O system structure 103settings will override the OSA-Express feature port ability to auto-negotiate with its attached Ethernet switch.Th

104 IBM ^ zSeries 990 Technical GuideThis function does not apply to IPv6 packets. TCP/IP will continue to perform all checksum processing for IPv6 p

Chapter 3. I/O system structure 105򐂰 Integrated Cluster Bus-4, ICB-4 (Peer mode), feature code 3393򐂰 Integrated Cluster Bus-3, ICB-3 (Peer mode) feat

106 IBM ^ zSeries 990 Technical GuideThis RPQ card supports Peer mode and Compatibility mode at 1 Gbps only. It extends the maximum distance of the I

Chapter 3. I/O system structure 107ports to support the ICB-2 connections. The STI-2 card converts the 2 GBps input into two 333 MBps ICB-2s. One ICB

x IBM ^ zSeries 990 Technical GuideBecome a published authorJoin us for a two- to six-week residency program! Help write an IBM Redbook dealing with

108 IBM ^ zSeries 990 Technical GuideThe port cards support concurrent maintenance. The ETR card port has a small form factor optical transceiver tha

© Copyright IBM Corp. 2003, 2004. All rights reserved. 109Chapter 4. Channel SubsystemThis chapter describes how the Channel Subsystem (CSS) is implem

110 IBM ^ zSeries 990 Technical Guide4.1 Multiple Logical Channel Subsystem (LCSS)The concept of Logical Channel Subsystem (LCSS) is new to the z990

Chapter 4. Channel Subsystem 111It is important to note that an IBM 2084 is one processor with logical extensions. All Channel Subsystem Images (CSS

112 IBM ^ zSeries 990 Technical Guidenumber of partitions defined in the RESOURCE statements in the IOCDS. It is unique for each logical partition. L

Chapter 4. Channel Subsystem 113We suggest you establish a naming convention for the logical partition identifiers. As shown in Figure 4-2 on page 11

114 IBM ^ zSeries 990 Technical GuideIn each LCSS, the CHPIDs are shared across all logical partitions. The CHPIDs in each LCSS can be mapped to thei

Chapter 4. Channel Subsystem 115Channel spanning is supported for internal links (HiperSockets, and Internal Coupling (IC) links), and for some exter

116 IBM ^ zSeries 990 Technical GuideIBM z990 CHPID Mapping Tool (CMT)The z990 CHPID Mapping Tool provides a mechanism to map CHPIDs onto PCHIDs as r

Chapter 4. Channel Subsystem 117Figure 4-5 z990 I/O configuration definition flow 4.3 LCSS-related numbersTable 4-3 lists LCSS-related information

© Copyright IBM Corp. 2003, 2004. All rights reserved. 1Chapter 1. zSeries 990 overviewThis chapter gives a high-level view of the IBM Eserver zSeries

118 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 119Chapter 5. CryptographyThis chapter describes the Cryptography functions of the z990. On the

120 IBM ^ zSeries 990 Technical Guide5.1 Cryptographic function supportThe z990 includes both standard cryptographic hardware and optional cryptogra

Chapter 5. Cryptography 121• Key generation, up to 2048-bit• Signature Verification, up to 2048-bit• Import and export of DES keys under an RSA key,

122 IBM ^ zSeries 990 Technical GuideMore information can be found in the publication IBM ^ zSeries CCA User Defined Extensions Reference and Guide,

Chapter 5. Cryptography 123VPN, and data storing applications that do not require FIPS 140-2 level 4 security. The cryptographic architecture include

124 IBM ^ zSeries 990 Technical GuideOS/390 operating environment to provide data privacy, data integrity, cryptographic key installation and generat

Chapter 5. Cryptography 125In the z990, there can be a maximum of six PCI Cryptographic Accelerator (PCICA) features (two per I/O cage), along with a

126 IBM ^ zSeries 990 Technical GuideFigure 5-2 PCI Cryptographic Accelerator featureEach PCICA feature has up to two cryptographic accelerator car

Chapter 5. Cryptography 127Table 5-1 PCI Cryptography features5.3.4 z990 cryptographic feature codesWhat follows is a list of the cryptographic fe

2 IBM ^ zSeries 990 Technical GuideThe z990 servers can be configured in numerous ways to offer outstanding flexibility in the deployment of e-busine

128 IBM ^ zSeries 990 Technical Guide5.3.5 TKE workstation featureA TKE workstation is part of a customized solution for using the Integrated Crypto

Chapter 5. Cryptography 129Notes1. Requires CPACF enablement.2. In order to make addition of PCIXCC and PCICA features nondisruptive, the logical par

130 IBM ^ zSeries 990 Technical Guidefeatures on behalf of OS/390 V2.10, z/OS V1.3, z/OS V1.4, and z/OS V1.5, and in addition supports the following

Chapter 5. Cryptography 131Table 5-3 Software requirements to support cryptographic featuresOperating system CPACF PCIXCC PCICAOS/390 V2.10 and z/O

132 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 133Chapter 6. Software supportThis chapter describes the software support available on the z990

134 IBM ^ zSeries 990 Technical Guide6.1 Operating system supportThere are many significant changes in the z990 architecture and hardware features w

Chapter 6. Software support 135z990 compatibility for selected OS/390 and z/OS releasesOS/390 V2.10, z/OS V1.2, and z/OS V1.3 require the Web deliver

136 IBM ^ zSeries 990 Technical GuideFigure 6-1 Conditions where compatibility maintenance is not requiredFigure 6-2 shows the situation where the

Chapter 6. Software support 137򐂰 z/OS with Compatibility Support must be IPLd in a partition that has an LPAR identifier in the range 0-F. If the LPA

Chapter 1. zSeries 990 overview 31.1 IntroductionThe z990 further extends and integrates key platform characteristics: dynamic and flexible partitio

138 IBM ^ zSeries 990 Technical GuidePlanned z/OS V1.6 supportExploitation Support (and Compatibility Support) is integrated into the base of z/OS V1

Chapter 6. Software support 139Figure 6-3 Logical flow of Java code execution on a zAAP zAAPs do not affect the overall MSU or capacity rating of a

140 IBM ^ zSeries 990 Technical GuidezAAP capacity is available and the Java work has no need for priority over non-Java work. When executed on a zAA

Chapter 6. Software support 141Initial Command Response time for the device. A similar change has also been made to the RMF Monitor II Device Activit

142 IBM ^ zSeries 990 Technical GuideThe PCIXCC features are the cryptographic hardware for the z990 that support Secure Keys. Clear Key support is p

Chapter 6. Software support 143Figure 6-4 D M=CPU command outputThe output from the D IOS,CONFIG(HSA) and D IOS,CONFIG(ALL) commands no longer has

144 IBM ^ zSeries 990 Technical GuideFigure 6-6 PCHID support for channel messagesEREPThe PCHID value associated with a particular CHPID is shown i

Chapter 6. Software support 145Dynamic activation for hardware changesIf a z990 processor running z/OSs with exploitation and Compatibility Support a

146 IBM ^ zSeries 990 Technical Guide– Note that the sum of initial and reserved processors for an ESA/390 mode logical partition can go up to 32 pr

Chapter 6. Software support 1476.6 Linux software supportThe currently available distributions SUSE SLES 7, SUSE SLES 8, Red Hat 7.1 and Red Hat RHE

4 IBM ^ zSeries 990 Technical GuideThe following channel types, or channel cards, are not supported on the z990:򐂰 Parallel channels򐂰 4-port ESCON car

148 IBM ^ zSeries 990 Technical Guide6.7.2 Summary of z/VM, z/VSE, VSE/ESA, TPF, and Linux software requirements Table 6-3 Minimum z/VM, z/VSE, V

Chapter 6. Software support 149Dynamic I/O support for multiple LCSSs X X XbXDynamic Add/Delete Logical Partition Name X24 processors within a single

150 IBM ^ zSeries 990 Technical Guide6.8 Workload License ChargesWorkload License Charges (WLC) is a software license charge method introduced with

Chapter 6. Software support 151capping controls the maximum rolling 4-hour average utilization (the “last” 4-hour average value at every five minutes

152 IBM ^ zSeries 990 Technical GuideWhen issued from an operating system running as a guest under z/VM, the result depends on whether the SET CPUID

Chapter 6. Software support 153The alternative is to be prepared for the boxed CTCs to occur during the next POR of the upgraded system. In most case

154 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 155Chapter 7. Sysplex functionsThis chapter describes the capabilities of the z990 to support c

156 IBM ^ zSeries 990 Technical Guide7.1 Parallel SysplexFigure 7-1 illustrates the components of a Parallel Sysplex as implemented within the zSeri

Chapter 7. Sysplex functions 157򐂰 z/OS and OS/390 software components allow new software releases to coexist with lower levels of that software compo

Chapter 1. zSeries 990 overview 5Model upgrade pathsWith the exception of the z900 Model 100, any z900 model may be upgraded to a z990 model. With th

158 IBM ^ zSeries 990 Technical GuideSystems managementThe Parallel Sysplex architecture provides the infrastructure to satisfy a customer requiremen

Chapter 7. Sysplex functions 159򐂰 Data access, allowing dynamic workload balancing and improved availability 򐂰 Dynamic transaction routing, providing

160 IBM ^ zSeries 990 Technical GuideEven though multiple servers can connect to only one Sysplex Timer unit, the typical configuration is usually co

Chapter 7. Sysplex functions 161. Figure 7-2 z990 SE workplace: External Timer Reference Configuration panelThe network ID configured on the z990 m

162 IBM ^ zSeries 990 Technical Guide7.2.2 Coupling Facility and CFCC considerationsThe z990 can participate in a Parallel Sysplex when the Coupling

Chapter 7. Sysplex functions 163partition. When the CF comes up, it displays its version on the OPRMSG panel for that partition.򐂰 Continue to run oth

164 IBM ^ zSeries 990 Technical Guide7.2.4 Coupling Facility link connectivityThe type of CF links you can use to connect a CF to an operating syste

Chapter 7. Sysplex functions 165Refer to Table 7-4 for an overview of the CF link connectivity options for the various supported servers.Table 7-4

166 IBM ^ zSeries 990 Technical GuideFor availability reasons, there should be:򐂰 At least two coupling links between z/OS and/or OS/390 and Coupling

Chapter 7. Sysplex functions 167CPs are Processor Units used to process z/OS, OS/390, CFCC, z/VM, Linux, TPF, VSE/ESA, or z/VSE instructions. The log

6 IBM ^ zSeries 990 Technical GuideCoupling Links, FICON, and OSA). In June 1997, IBM announced increased support - up to 15 logical partitions on Ge

168 IBM ^ zSeries 990 Technical Guide7.2.7 Dynamic CF dispatching and dynamic ICF expansionThe CF Control Code (CFCC), the “CF Operating System,” is

Chapter 7. Sysplex functions 169Dynamic ICF expansion can also be configured using dedicated ICF PUs and shared CPs from the z/OS image. The z/OS ima

170 IBM ^ zSeries 990 Technical Guide򐂰 Cost benefitsCost benefits are realized by enabling the use of non-standalone Coupling Facilities (for example

Chapter 7. Sysplex functions 171Figure 7-7 System-managed CF structure duplexingWhenever possible, try to comply with the following recommendations

172 IBM ^ zSeries 990 Technical GuideIt includes a sample migration plan, describes how to monitor this new Parallel Sysplex technology and how to de

Chapter 7. Sysplex functions 173Parallel Sysplex cluster must be configured with redundant hardware (for example, a Coupling Facility and a Sysplex T

174 IBM ^ zSeries 990 Technical GuideFigure 7-9 HyperSwapPlanned HyperSwapGDPS/PPRC planned HyperSwap provides:򐂰 The ability to switch all primary

Chapter 7. Sysplex functions 175The HyperSwap function is designed to be controlled by complete automation, allowing all aspects of the site switch t

176 IBM ^ zSeries 990 Technical GuideFigure 7-10 shows how a GDPS/PPRC Cross-site extended distance Parallel Sysplex can be established with RPQ 8P22

Chapter 7. Sysplex functions 177The physical topology of a GDPS/XRC, shown on Figure 7-11, consists of a production site (Site 1) and a recovery site

Chapter 1. zSeries 990 overview 7benefits, it was essential that the Channel Subsystem also be scalable and allow “horizontal” growth. This is facili

178 IBM ^ zSeries 990 Technical GuideGDPS-CBU management automates the process of dynamically adding reserved Central Processors, thereby minimizing

Chapter 7. Sysplex functions 179IRD addresses three separate but mutually supportive functions:򐂰 LPAR CPU managementWLM dynamically adjusts the numbe

180 IBM ^ zSeries 990 Technical GuideValue of CPU managementThe benefits of CPU management include the following:򐂰 Logical CPs perform at the fastest

Chapter 7. Sysplex functions 181Where several channels are attached from a z990 LCSS to a switch, they can be considered a resource pool for accessin

182 IBM ^ zSeries 990 Technical Guide򐂰 Simplified I/O definitionThe connection between managed channels and managed control units does not have to be

Chapter 7. Sysplex functions 183Value of Channel Subsystem Priority QueueingThe benefits proved by Channel Subsystem Priority Queueing include the fo

184 IBM ^ zSeries 990 Technical GuideWLM sets priorities within a range of eight values that will be mapped to the specified range. If a larger range

Chapter 7. Sysplex functions 185System automation - I/O operationsWhen using system automation, take care when using PROHIBIT or BLOCK on a port that

186 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 187Chapter 8. Capacity upgradesThis chapter describes the zSeries 990 server’s capacity upgrade

8 IBM ^ zSeries 990 Technical Guide1.3.7 I/O connectivityHere we discuss I/O connectivity.I/O cageEach book provides 12 STI links (48 STI maximum wi

188 IBM ^ zSeries 990 Technical Guide8.1 Concurrent upgradesThe z990 servers have the capability of concurrent upgrades, providing additional capaci

Chapter 8. Capacity upgrades 189These LIC-CC based PU conversions, as listed in Table 2-7 on page 65, require that at least one PU (CP, ICF or IFL) r

190 IBM ^ zSeries 990 Technical GuideOn/Off CoD can concurrently add processors (CPs, IFLs, ICFs, and zAAPs) up to the limit of the installed book(s)

Chapter 8. Capacity upgrades 191Code Configuration Control (LIC-CC) only or also by installing additional book(s) and/or I/O card(s):򐂰 CUoD upgrades

192 IBM ^ zSeries 990 Technical Guideadditional CPs, IFLs, ICFs, and zAAPs in the upgrade, additional book(s) may be required and can be concurrently

Chapter 8. Capacity upgrades 193upgrades. The operating system must have the capability to concurrently configure more processors online.Software cha

194 IBM ^ zSeries 990 Technical GuideFigure 8-2 CUoD for memory exampleThis one-book z990 model has two 16 GB memory cards, resulting in 32 GB of i

Chapter 8. Capacity upgrades 195򐂰 The new amount of installed memory cannot cause the storage granularity or increment to change.However, a new Reset

196 IBM ^ zSeries 990 Technical GuideThe additional channels installed concurrently to the hardware can also be concurrently activated to an operatin

Chapter 8. Capacity upgrades 197Additional logical processors can be concurrently configured online to logical partitions by the operating system whe

Chapter 1. zSeries 990 overview 9Up to 1024 ESCON channelsThe high density ESCON feature (FC 2323) has 16 ports, of which 15 can be activated for cus

198 IBM ^ zSeries 990 Technical GuideFigure 8-4 CIU ordering exampleThe following is a sample list of the screen sequences a customer must follow o

Chapter 8. Capacity upgrades 199Figure 8-5 CIU activation exampleOrder and fulfillment processBy using the CIU process, associated systems allow th

200 IBM ^ zSeries 990 Technical GuideFigure 8-6 CIU order exampleThe number of CPs, ICFs, zAAPs, IFLs, SAPs, memory size, CBU features, unassigned

Chapter 8. Capacity upgrades 201ActivationThe customer's system stores all the LIC-CC records associated with the z990 that has the CIU option.

202 IBM ^ zSeries 990 Technical GuideFigure 8-8 CIU upgrade selection screenAn On/Off CoD upgrade for processors cannot be applied while a previous

Chapter 8. Capacity upgrades 203The On/Off CoD upgrade features are:– On/Off CoD Active CP (FC 9897)– On/Off CoD Active IFL (FC 9888)– On/Off CoD Act

204 IBM ^ zSeries 990 Technical GuideWhen the customer disposes of the server, or decides that they want to disable future On/Off CoD, the customer i

Chapter 8. Capacity upgrades 205Figure 8-9 On/Off CoD order exampleThis On/Off CoD example is ordering an upgrade from four CPs to five CPs plus tw

206 IBM ^ zSeries 990 Technical GuideOn/Off CoD right to use feature without transferring ownership. This might be desirable if the customer wants to

Chapter 8. Capacity upgrades 207CBU can only add CPs to an existing z990 server, but note that CPs can assume any kind of workload that could be runn

10 IBM ^ zSeries 990 Technical GuideThe required Linux level for this function is SLES 8 from SUSE. This support allows a z990 system to access indus

208 IBM ^ zSeries 990 Technical GuideWhen the emergency is over (or the CBU test is complete), the server must be taken back to its original, permane

Chapter 8. Capacity upgrades 209CBU testingTesting of disaster/recovery plans is easy with CBU. Testing can be accomplished by ordering a diskette, c

210 IBM ^ zSeries 990 Technical Guide򐂰 Reduce the outage time to restart critical workloads from several hours to minutes.8.6 Nondisruptive upgrades

Chapter 8. Capacity upgrades 211MemoryMemory can be concurrently added to a z990 server up to the physical installed memory limit. Additional book(s)

212 IBM ^ zSeries 990 Technical GuideFigure 8-11 Shared logical partitions upgrade exampleThere are two activated logical partitions: LP1, having s

Chapter 8. Capacity upgrades 213Dedicated and shared logical partitions upgradeFigure 8-12 shows a 2084-B16 software model 309 server. This two-book

214 IBM ^ zSeries 990 Technical Guideconfiguring one more CP online, with one reserved CP for a future image upgrade. LP1 now has four dedicated CPs,

Chapter 8. Capacity upgrades 215This two-book server configuration has nine CPs and seven spare PUs. The concurrent hardware upgrade adds three zAAP

216 IBM ^ zSeries 990 Technical Guide򐂰 LP2 has six shared (SHR) logical CPs and two reserved CPs defined.򐂰 Logical partition LP3 is defined with one

Chapter 8. Capacity upgrades 217Now let us see the logical upgrade. LP3 has one reserved ICF defined, and since the server now has one more physical

Chapter 1. zSeries 990 overview 11You can choose any combination of OSA features: the OSA-Express Gigabit Ethernet LX (FC1364), the OSA-Express Gigab

218 IBM ^ zSeries 990 Technical GuideThe only resource that spare partitions will use is subchannels, so careful planning must be done here, keeping

Chapter 8. Capacity upgrades 219Considerations when installing additional booksDuring a z990 server upgrade, additional books can be concurrently ins

220 IBM ^ zSeries 990 Technical GuideThe z990 servers have performance improvements on all workload environments, from traditional to e-business on d

Chapter 8. Capacity upgrades 221Each book has its own MCM (which contains PUs and an L2 cache), memory cards, and MBAs with their STIs. Up to four bo

222 IBM ^ zSeries 990 Technical GuideThis implementation provides optimal performance and a more linear scalability to the z990 server. The results c

Chapter 8. Capacity upgrades 223The PCIXCC feature supports secure cryptographic functions, use of secure encrypted key values, and User-Defined Exte

224 IBM ^ zSeries 990 Technical GuideMeasurements are the most accurate source for processor capacity data. Modeling techniques may produce reasonabl

Chapter 8. Capacity upgrades 225determine the capacity of processor B relative to that of processor A, the ITR Ratio (ITRR) is calculated as follows:

226 IBM ^ zSeries 990 Technical GuideFor a complete description of these LSPR workloads, refer to Large Systems Performance Reference, SC28-1187.LSPR

Chapter 8. Capacity upgrades 227򐂰 CB-S (Commercial Batch Short job steps - I/O-Intensive; formerly CB84)The CB-S workload is a moderate commercial ba

12 IBM ^ zSeries 990 Technical GuideOSA-Express ATMThe OSA-Express Asynchronous Transfer Mode (ATM) features are not supported on z990. They are not

228 IBM ^ zSeries 990 Technical Guidebetween requests so that on average it generates the specified number of requests per second.򐂰 WASDB/L (WebSpher

Chapter 8. Capacity upgrades 229The new default mixed workload is the LSPR-Mix, which is calculated with equal mix (20%) of CB-L, CB-S, WASDB, OLTP-W

230 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 231Chapter 9. Environmental requirementsThis chapter introduces the IBM eServer™ zSeries 990 en

232 IBM ^ zSeries 990 Technical Guide9.1 IntroductionThe z990 is always a two-frame system. The frames are shipped separately and are fastened toget

Chapter 9. Environmental requirements 233Table 9-2 Internal Battery Feature emergency power times9.1.4 Emergency power-offOn the front of frame A

234 IBM ^ zSeries 990 Technical GuideTable 9-4 System weights9.3 DimensionsThe z990 always has two frames: frame A and frame Z. The external dimen

© Copyright IBM Corp. 2003, 2004. All rights reserved. 235Appendix A. Hardware Management Console (HMC)In this appendix, we discuss the z990 Hardware

236 IBM ^ zSeries 990 Technical GuideConsolidation of:򐂰 Operator controls򐂰 Hardware status reporting򐂰 Hardware message presentation򐂰 Operating system

Appendix A. Hardware Management Console (HMC) 237Figure A-2 Multi CPC environmentImportant: Beginning with the next zSeries server, after the IBM ^

Chapter 1. zSeries 990 overview 13complex RSA cryptographic operations used with the Secure Sockets layer (SSL) protocol supporting e-business. The P

238 IBM ^ zSeries 990 Technical Guidez990 Hardware Management ConsoleA local Hardware Management Console must be connected to its Support Elements us

Appendix A. Hardware Management Console (HMC) 239Figure A-3 Token ring only wiring scenarioAdditional token ring only wiring scenarioAdditional con

240 IBM ^ zSeries 990 Technical GuideFigure A-4 Token ring only wiring with additional connectionsEthernet only - one-path wiring scenarioThis Ethe

Appendix A. Hardware Management Console (HMC) 241Figure A-5 Ethernet only - one path wiring scenarioAdditional connections to the Ethernet LANAddit

242 IBM ^ zSeries 990 Technical GuideEthernet only - two-path wiring scenarioThe Ethernet only - two-path wiring scenario is not applicable to system

Appendix A. Hardware Management Console (HMC) 243Additional connections to the Ethernet LANThese may be made to expand the connectivity beyond the lo

244 IBM ^ zSeries 990 Technical Guidebetween the devices. The Ethernet adapter will have to be assigned an address on a separate subnet from the toke

Appendix A. Hardware Management Console (HMC) 245Choosing the best option involves understanding your remote control needs and use patterns. Figure A

246 IBM ^ zSeries 990 Technical Guidez990 HMC enhancementsHere we discuss z990 HMC enhancements.z990 HMC Integrated 3270 ConsoleFor many users, parti

Appendix A. Hardware Management Console (HMC) 247Minor changes to “Operating System Messages”Based on customer requirements, minor changes have been

14 IBM ^ zSeries 990 Technical GuideICB-3 (Integrated Cluster Bus 3)The Integrated Cluster Bus-3 (ICB-3) link is a member of the family of Coupling L

248 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 249Appendix B. Fiber optic cabling servicesIn order to address the complexities and changes ove

250 IBM ^ zSeries 990 Technical GuideFiber optic cabling services from IBM As mentioned, fiber optic cables, cable planning, labeling, and installati

Appendix B. Fiber optic cabling services 251Under the zSeries Fiber Cabling Services umbrella there are two options to provide individual fiber optic

252 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004 253Glossary active configuration. In an ESCON environment, the ESCON Director configuration determined by the status

254 IBM ^ zSeries 990 Technical Guidecore. (1) In an optical cable, the central region of an optical fiber through which light is transmitted. (2) In

Glossary 255ESA/390. See Enterprise Systems Architecture/390.ESCD console. The ESCON Director display and keyboard device used to perform operator a

256 IBM ^ zSeries 990 Technical Guideinitial program load (IPL). (1) The initialization procedure that causes an operating system to commence operati

Glossary 257local area network (LAN). A computer network located in a user’s premises within a limited geographic area.Logical Channel Subsystem (LC

Chapter 1. zSeries 990 overview 151.3.10 Intelligent Resource Director (IRD)Exclusive to the IBM z/Architecture is Intelligent Resource Director (IR

258 IBM ^ zSeries 990 Technical Guideoriginal equipment manufacturers information (OEMI). A reference to an IBM guideline for a computer peripheral i

Glossary 259Small Computer System Interface (SCSI). (1) An ANSI standard for a logical interface to a computer peripherals and for a computer periph

260 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 261Related publicationsThe publications listed in this section are considered particularly suit

262 IBM ^ zSeries 990 Technical Guide򐂰 S/390 Installation Manual - Physical Planning Parallel Enterprise Server - Generation 5 Parallel Enterprise Se

Related publications 263򐂰 IBM: z/OS downloads - Useful technology demos, sample code, tools, and documentation for the z/OS platformhttp://www.ibm.c

264 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 265IndexNumerics1000BASE-T Ethernet 1116-port ESCON feature 9350.0 micron 100–10162.5 mi

266 IBM ^ zSeries 990 Technical GuideDynamic Add/Deletelogical partition name 61, 113Dynamic CF Dispatching 168Dynamic Channel-path Management

Index 267LICCC 6Linux 47, 60Integrated Facilities for Linux 47mode 69storage 69Linux on zSeries 19, 147logical book structure 39Logica

16 IBM ^ zSeries 990 Technical GuideCapacity Upgrade on Demand (CUoD)Capacity Upgrade on Demand offers server upgrades via Licensed Internal Code (LI

268 IBM ^ zSeries 990 Technical GuideRRedbooks Web site 263Contact us xrefrigeration 25Reliability, Availability, Serviceability (RAS) 17Rese

(0.5” spine)0.475”<->0.873”250 <-> 459 pagesIBM ^ zSeries 990 Technical Guide

®SG24-6947-01 ISBN 0738497657INTERNATIONAL TECHNICALSUPPORTORGANIZATIONBUILDING TECHNICAL INFORMATION BASED ON PRACTICAL EXPERIENCEIBM Redbooks are de

Chapter 1. zSeries 990 overview 171.3.13 PerformanceThe IBM Large Systems Performance Reference method provides comprehensive z/Architecture process

International Technical Support OrganizationIBM ^ zSeries 990 Technical GuideMay 2004SG24-6947-01

18 IBM ^ zSeries 990 Technical Guidethrough rigorous design rules, design walk-throughs, peer reviews, element/subsystem/system simulation, and exten

Chapter 1. zSeries 990 overview 19workloads; and batch jobs get resources as they are available. The strength of zSeries I/O subsystem and I/O balanc

20 IBM ^ zSeries 990 Technical GuideOS/390 and z/OSOS/390 R10 and z/OS 1.2 to z/OS 1.5 and later all provide Compatibility support. In addition, z/OS

Chapter 1. zSeries 990 overview 21Parallel Sysplex License Charges (PSLC) apply for OS/390 software products and may apply with the PSLC price option

22 IBM ^ zSeries 990 Technical Guide

© Copyright IBM Corp. 2003, 2004. All rights reserved. 23Chapter 2. System structure and designThis chapter introduces the IBM ^ zSeries 990 system st

24 IBM ^ zSeries 990 Technical Guide2.1 System structureThe z990 structure and design are the result of the continuous evolution of S/390 and zSerie

Chapter 2. System structure and design 25PowerEach book get its power from two Distributed Converter Assemblies (DCA) that reside on the opposite sid

26 IBM ^ zSeries 990 Technical Guide2. The Motor Scroll Assembly (MSA)3. The Motor Drive Assembly (MDA)– MDAs are found throughout the frames to prov

Chapter 2. System structure and design 27򐂰 The IBM 2084 model D32 has four books (D) with 12 PUs in each book for a total of 48 PUs, of which 32 can

© Copyright International Business Machines Corporation 2003, 2004. All rights reserved.Note to U.S. Government Users Restricted Rights -- Use, dupli

28 IBM ^ zSeries 990 Technical Guide򐂰 A book may have more memory installed than enabled. The excess amount of memory can be installed by a Licensed

Chapter 2. System structure and design 29When activated, a logical partition can use memory resources located in any book. No matter in which book th

30 IBM ^ zSeries 990 Technical GuideFigure 2-4 Concentric ring structureA memory-coherent director optimizes ring traffic and filters out cache tra

Chapter 2. System structure and design 31Figure 2-6 Three-book system ring structureFigure 2-7 Four-book system ring structure2.1.5 Connectivity

32 IBM ^ zSeries 990 Technical GuideFigure 2-8 STI connectors and MBA cardEach book has three MBAs, each driving four STIs, resulting in 12 STIs pe

Chapter 2. System structure and design 33availability purposes. Reports from the CHPID Mapping tool can help you validate your I/O configuration. Boo

34 IBM ^ zSeries 990 Technical GuideA frameAs shown in Figure 2-9 on page 33, the main components in the A-frame are:1. Two Internal Battery Features

Chapter 2. System structure and design 35– High Speed Token Ring򐂰 PCI Cryptographic Accelerator (PCICA, two processors per feature).򐂰 PCIX Cryptograp

36 IBM ^ zSeries 990 Technical GuideFigure 2-11 MCM chip layout2.1.8 The PU, SC, and SD chipsAll chips use CMOS 9SG technology, except for the clo

Chapter 2. System structure and design 37SD chipThe level 2 cache (L2) is implemented on the four System Data (SD) cache chips, each with a capacity

© Copyright IBM Corp. 2003, 2004. All rights reserved. iiiContentsNotices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

38 IBM ^ zSeries 990 Technical Guide2.2 System designThe IBM z990 Symmetrical Multi Processor (SMP) design is the next step in an evolutionary traje

Chapter 2. System structure and design 39򐂰 To have a balanced system design, providing large data rate bandwidths for high performance connectivity a

40 IBM ^ zSeries 990 Technical GuideFigure 2-12 Logical book structureThere are up to 12 STI buses per book to transfer data and each STI has a bid

Chapter 2. System structure and design 41Data transfer between the CEC memory and attached I/O devices or CPCs is done through the Memory Bus Adapter

42 IBM ^ zSeries 990 Technical Guideunder way to update the C++ compiler and Java Virtual Machine for z/OS to better exploit the z990 microprocessor

Chapter 2. System structure and design 43Figure 2-13 Dual (asymmetric) processor designEach PU has a dual processor and each processor has its own

44 IBM ^ zSeries 990 Technical GuideProcessor Branch History Table (BHT)The Branch History Table (BHT) implementation on processors has a key perform

Chapter 2. System structure and design 45The success rate that the BHT design offers contributes a great deal to the superscalar aspects of the z990,

46 IBM ^ zSeries 990 Technical GuideExtended Translation FacilityThe Extended Translation Facility adds 10 instructions to the zSeries instruction se

Chapter 2. System structure and design 47򐂰 PU sparingIn the rare case of a PU failure, the failed PU’s characterization is dynamically and transparen

iv IBM ^ zSeries 990 Technical Guide2.2.8 Storage operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

48 IBM ^ zSeries 990 Technical GuideAll PUs characterized as IFL processors within a configuration are grouped into the ICF/IFL/zAAP processor pool.

Chapter 2. System structure and design 49The CFCC command DYNDISP controls the Dynamic CF Dispatching (use DYNDISP ON to enable the function). For mo

50 IBM ^ zSeries 990 Technical GuideA zAAP only executes Java Virtual Machine (JVM) code and is the only authorized user of a zAAP in association wit

Chapter 2. System structure and design 51򐂰 IBM 2084-C24: Maximum additional orderable SAPs is six.򐂰 IBM 2084-D32: Maximum additional orderable SAPs i

52 IBM ^ zSeries 990 Technical GuideProcessor Unit characterizationProcessor Unit (PU) characterization is done at Power-on Reset time when the serve

Chapter 2. System structure and design 53Table 2-3 PU chip allocation򐂰 On a single-book configuration, model A08:– When a PU failure occurs on a du

54 IBM ^ zSeries 990 Technical Guide򐂰 Dynamic Memory sparingThe z990 does not contain spare memory DIMMs. Instead, it has redundant memory distribute

Chapter 2. System structure and design 55unlikely, memory should fail, it is technically feasible to Power-on Reset the system with the remaining mem

56 IBM ^ zSeries 990 Technical GuideThe Storage Assignment function of a Reset Profile on the Hardware Management Console just shows the total “Insta

Chapter 2. System structure and design 57Figure 2-15 z990 Modes of operation diagramLogical Partitioning overviewLogical Partitioning is a function

Contents v6.2 z/OS software support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1346.2.1 Com

58 IBM ^ zSeries 990 Technical GuidePR/SM enables z990 servers to be initialized for logically partitioned operation, supporting up to 30 logical par

Chapter 2. System structure and design 59Figure 2-16 Logical processor assignment (HMC- Image Profile)On the z990, the sum of defined and reserved

60 IBM ^ zSeries 990 Technical GuideIOCP is available on the z/OS, OS/390, z/VM, VM/ESA, z/VSE, and VSE/ESA operating systems, and as a stand-alone p

Chapter 2. System structure and design 61all combinations, an image can also have Reserved Processors defined, allowing non-disruptive image upgrades

62 IBM ^ zSeries 990 Technical Guide2.2.7 Model configurationsThe z990 server model nomenclature is based on the number of PUs available for custome

Chapter 2. System structure and design 63If the upgrade request cannot be accomplished within the given model, a model upgrade is required. A model u

64 IBM ^ zSeries 990 Technical GuideTable 2-6 shows that regardless of the number of books, a configuration with one characterized CP is possible (fo

Chapter 2. System structure and design 65򐂰 Conversion of feature code 1716 to 0716, for conversion of an unassigned CP to a CP򐂰 Conversion of feature

66 IBM ^ zSeries 990 Technical GuideSoftware model MSU valuesAll software models have an MSU value that is used the determine the software license ch

Chapter 2. System structure and design 67with operator controls for its associated CPC, so you can target operations in parallel to multiple or all C

vi IBM ^ zSeries 990 Technical Guide8.5 Capacity BackUp (CBU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

68 IBM ^ zSeries 990 Technical GuideFigure 2-18 shows the z990 modes and memory diagram, summarizing all image modes, with their processor types and

Chapter 2. System structure and design 69An ESA/390 mode image is always initiated in 31-bit addressing mode. During its initialization, a z/Architec

70 IBM ^ zSeries 990 Technical GuideOnly Linux and z/VM operating systems can run in Linux Only mode:򐂰 Linux for zSeries uses 64-bit addressing and o

Chapter 2. System structure and design 71Table 2-10 LPAR storage granularityRemember that logical partitions are currently limited to a maximum siz

72 IBM ^ zSeries 990 Technical Guide򐂰 Dynamic I/O reconfigurationDynamic I/O reconfiguration enhances system availability by supporting the dynamic a

© Copyright IBM Corp. 2003, 2004. All rights reserved. 73Chapter 3. I/O system structureThis chapter describes the I/O system structure, the connectiv

74 IBM ^ zSeries 990 Technical Guide3.1 OverviewThe z990 I/O system design provides great flexibility, high availability and performance, allowing:H

Chapter 3. I/O system structure 75The following cryptographic feature cards are supported in the zSeries 990 server:򐂰 Up to four Peripheral Component

76 IBM ^ zSeries 990 Technical GuideFigure 3-2 z990 I/O cageEach I/O domain requires one Self-Timed Interconnect Multiplexer (eSTI-M) card. All I/O

Chapter 3. I/O system structure 77Each eSTI-M card is connected to an STI jack located in a book’s Memory Bus Adapter (MBA) via an STI cable. As each

© Copyright IBM Corp. 2003, 2004. All rights reserved. viiNoticesThis information was developed for products and services offered in the U.S.A. IBM ma

78 IBM ^ zSeries 990 Technical GuideFigure 3-3 STIs and I/O cage connectionsA Memory Bus Adapter (MBA) STI connector, located in a book, can be con

Chapter 3. I/O system structure 79Depending on the number of I/O slots plugged into the cage, there may be from one to seven eSTI-M cards plugged int

80 IBM ^ zSeries 990 Technical GuideSTI links balancing across books and MBAsFigure 3-4 shows a 2084-B16 server’s initial configuration example with

Chapter 3. I/O system structure 81Figure 3-5 2084-B16-to-D32 upgrade exampleThis upgrade adds, concurrently, two more books in the CEC cage, and th

82 IBM ^ zSeries 990 Technical GuideFigure 3-6 Upgrade example with the STI Rebalance feature (FC 2400)Now you can see that the required number of

Chapter 3. I/O system structure 83possible to see any places where a control unit, or group of control units, have single points of failure (SPOF); i

84 IBM ^ zSeries 990 Technical GuideThe z990 CHPID Mapping Tool (CMT) can help you plan for the best I/O port selection for high availability purpose

Chapter 3. I/O system structure 85– Optica Technologies 34600 FXBT ESCON Converter. For more information, check the Optica Technologies Web site: htt

86 IBM ^ zSeries 990 Technical GuideCryptographic Coprocessor Facility used by known applications have also been implemented in the PCIXCC feature.3.

Chapter 3. I/O system structure 87Figure 3-9 PCHID Report exampleI/O slot 01 has an ISC-3 Daughter (ISC-D) half-high card (FC 0218) in the top, con